detect instruction types
This commit is contained in:
62
riscv64.c
62
riscv64.c
@@ -1,3 +1,6 @@
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// https://docs.riscv.org/reference/isa/_attachments/riscv-unprivileged.pdf
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// https://riscv.org/wp-content/uploads/2024/12/riscv-calling.pdf
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// https://jborza.com/post/2021-05-11-riscv-linux-syscalls/
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#include <gelf.h>
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#include <libelf.h>
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#include <stdint.h>
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@@ -40,6 +43,62 @@ Section get_code_section(uint8_t *exe_bytes, size_t exe_size) {
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exit(1);
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}
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void riscv64_disassemble(uint8_t *exe_bytes, Section section) {
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size_t offset = section.offset;
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while (offset < section.offset + section.size) {
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uint32_t ins;
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memcpy(&ins, exe_bytes + offset, 4);
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uint16_t opcode = ins & 0x7f; // last 7 bits
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// https://stackoverflow.com/questions/62939410/how-can-i-find-out-the-instruction-format-of-a-risc-v-instruction
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switch (opcode) {
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case 0b1100011:
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printf("B-type\n");
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break;
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case 0b0010011:
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printf("I-type 1\n");
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break;
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case 0b0000011:
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printf("I-type 2\n");
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break;
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case 0b1100111:
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printf("I-type 3\n");
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break;
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case 0b1110011:
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printf("I-type 4\n");
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break;
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case 0b1101111:
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printf("J-type\n");
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break;
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case 0b0110011:
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printf("R-type 1\n");
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break;
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case 0b0101111:
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printf("R-type 2\n");
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break;
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case 0b0111011:
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printf("R-type 3\n");
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break;
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case 0b0100011:
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printf("S-type\n");
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break;
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case 0b0110111:
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printf("U-type 1\n");
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break;
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case 0b0010111:
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printf("U-type 2\n");
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break;
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default:
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fprintf(stderr, "Unrecognized opcode: %07b\n", opcode);
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exit(1);
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}
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offset += 4;
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}
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}
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int main(int argc, char *argv[]) {
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if (elf_version(EV_CURRENT) == EV_NONE) {
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fprintf(stderr, "Failed to initialize libelf: %s\n", elf_errmsg(-1));
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@@ -69,6 +128,5 @@ int main(int argc, char *argv[]) {
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Section section = get_code_section(exe_bytes, exe_size);
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printf("Offset: %zu\n", section.offset);
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printf("Size: %zu\n", section.size);
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riscv64_disassemble(exe_bytes, section);
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}
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